Buffer

[rocket88]

Fulfilling a request for a buffer, under requests. it's a Fet-Si buffer

Schematic


Layout
 

untested, but pretty confident this will work. i'm also going to work on a more compact layout.

[IvIark]

Nice one buddy.  What buffer is this?  It reminds me of thee Cornish but obviously isn't the one we've seen

[rocket88]

honestly mark, i'm not sure. it's the one requested by boratto. i think i can get it smaller, and a little neater, but if it's good now, at least its something, ya know?

[boratto]

Another Matt Molter gem! Thank you Rocket!

[reggy1]

Necro-bump for the sake of future users who may be curious about this buffer. I'm on a bit of a buffer binge at the moment, purely out of curiosity and learning.
Couldn't get any output from this as drawn, so compared it to the schematic.

Noticed 100uf cap was wrong polarity, so flipped it with neg going to ground.

Audio-probing, I couldn't get any signal at the junction of the 100ohm/150K resistors just prior to the output. Noticed that 2.2uf cap should connect to this junction. At present it goes nowhere. Linked the cap's track to the spare hole between the 100ohm and 150K resistors.

Now I have sound at the "northern" side of the 100ohm, but nothing at the output.
I've exhausted my meagre knowledge store.

What is the purpose of the 100ohm resistor, and is it so large (although relatively tiny) that it completely blocks any output?

This circuit appears to be unique/unusual when compared to the usual transistor-based units, so I thought it may be useful for future searchers to get it operational.

Reg

[Frank_NH]

I simulated this circuit in LTSpice and it works fine.  The problem with the vero is that the 2N5457 FET has a pinout of DSG not DGS as shown.  So the vero will have to be redone.

[Frank_NH]

Here's my vero layout.  Not the most compact but comfortable to build.  Let me know if there are problems.  I plan to build this as I am a fan of the Cornish buffer and this appears to be a similar "bootstrap" type buffer circuit.

[edit:  verified!  vero has been updated ]

[reggy1]

Thank you, Frank.
I'll give this one a go.
Should 22uf cap be flipped so that +'ve goes to S and -'ve goes to 150K/2M2/270K?.

Reg

[reggy1]

Hi Frank.
Should be cut at 4/5 on row A, under D1.
Building now.

Reg

[reggy1]

Verified, after almost 5 years, with extra cut and flipped capacitor as detailed above.

Thanks for your efforts, Frank.

[Frank_NH]

Yeah - sorry for forgetting the diode cut - I'll correct the vero when I can today.  Late night  .  But it would have still worked with the diode shorted...

As for the 22uF cap, I flipped it on purpose because my LTSpice simulation indicated that the lower voltage was towards the junction of the resistors, but check it out in your working circuit and make sure the negative end of the cap is on the lower voltage side.  For lower value caps (e.g. 1 uF) I often use film or non-polar electrolytics so I don't have to worry about that...

Let us know how it sounds.  LTSpice says it should have a very flat response.