I if refer to my j201s, you mixed source and gate on all trannies. the way I draw it on my schematic may have trapped you, sorry
the source resistor to Q1 is 1K and not 1K5
You missed a 1n cap between the 3k resistor and the second 3n3 cap, it should be connected to Q3's gate...
otherwise, seems ok to me
edit : You were faster than me :)