JFETS!

[Frank_NH]

I've been doing some JFET research lately that I'd like to share, and thought I'd see if anyone wanted to talk about these wonderful but frustrating(!) components.  I apologize in advance for the length of this post...

I've been looking into the theory and math behind JFET operation in the so-called common source amplifier circuit that's used in many "amp-in-a-box" effects to simulate tube stages (e.g. Thor, Supreaux, JCM800 Emulator, Wampler Plexidrive, etc.).  I've also read and reread the ROG Fetzer Valve article, which deals with this configuration.

http://www.runoffgroove.com/fetzervalve.html

My interest was raised by people complaining that effects such as the Plexidrive did sound right unless you had source/drain trimmers, and even then they still didn't seem right.   And the JC800 Emulator seemed in particularly hard to dial in.  I've also experienced biasing problems with an old Thor build and the Formula 5.  Why was this?  Was there anything I could do as a builder?  Here's what I found from my investigations (and please correct any misinformation I may provide):

(1) You need to measure the JFETs before you use them!

Yes - every single one.  What you need to measure specifically are the idle (max) current (Idss) and the "pinch off" voltage (Vp).  Those two parameters more or less determine the behavior of the device, and, as shown in the Fetzer article, they can vary widely for given JFET type (J201, 2N5457...).  

IvIark shared a layout for a JFET tester that I recently built here:

http://tagboardeffects.blogspot.com/2012/07/greatly-improved-jfet-matcher.html

Works great.  (BTW you only need a SPDT switch to switch between the Idss and Vp modes.  Use a separate SPST switch for activating the power).  Here are some sample readings from a few of my JFETs.

Idss (mA), Vp (V)
J201: (Idss=0.270, Vp = -0.622)
J201: (Idss=0.663, Vp = -0.933)
J201: (Idss=0.781, Vp = -1.030)
2N5457: (Idss=2.95, Vp = -1.570)
2N5457: (Idss=3.68, Vp = -1.810)
2N5457: (Idss=1.94, Vp = -1.230)

Not too consistent (they are within spec based on the data sheets).  But knowing these readings for each JFET will help eventually in applying them to specific circuits.  So...time to get out the labels...

(2) If you are given a circuit with the common source configuration (see the Fetzer article, Figure 1), and you have fixed source and drainer resistors (like the Plexidrive), can you determine what JFET Idss and Vp are needed?  The answer is yes!  You have to go through a bit of math (which I now have in a spreadsheet), but it looks like you can calculate the DC bias point and required drain resistor value for a given JFET (Idss, Vp are known), voltage (e.g. 9V),  source resistor, and desired drain bias voltage (e.g. 4.5V).  So at least you can know if a measured JFET will work OK or not.  Hopefully then, you can be confident that when presented with a circuit like the Plexidrive, you'll know approximately what parameters are needed for your JFETs.  Whether you actually HAVE any may be a different story....

(3) Does the drain bias voltage always have to be 4.5 V?  What if you mess around with the source/drain resistors, all other things being the same - will the effect work?    The answers are: No and Maybe.   You need to make sure that if you do make changes, you're not so off in your bias point that the JFET goes into shut off, or maxes out at 9V and starts clipping (unless that's what you want).  If you look at the Fetzer article, they actually choose a magic source resistor value based on (you guessed it) Idss and Vp.  This is NOT a midpoint bias but a different bias level which makes the JFET act more "tube like" (read the article for more information and justification).   You can actually get higher gain if you don't use the Fetzer source resistor value, but it won't have the same tube "mojo".  

This tolerance for (modestly) different bias points is the reason that some effects can still sound OK (maybe slightly different) even though the JFET drain voltages are different from a provided reference value.  It all depends on your JFET parameters and the bias point.

I have a layout for the ROG original Supreaux, amp-in-a-box effect where I'm going to test my research out and see if I can match appropriate JFETs to the circuit.  If that works OK I'll try my hand at the dreaded JCM800 Emulator (ha, ha).

I'll stop here...thanks for your attention.  

[rocket88]

Hmm. That's realy interesting and make sense. I wonder though, is this the approach you need for all circuits using jfets. For instance, I built a catalinbread SFT, and it sounds like the videos, but at higher gain it's a little grainy so to speak, so I wonder if I should be applying the same logic to that circuit as well. It also makes me wonder if the reason for the issues we have with jfets is the inconsistencies, which to me seem to be worse then Si or Ge transistors.

[IvIark]

Great read Frank, I'll be interested to hear how you get on with the Supreaux

[Silver Blues]

Thanks for the info, I'll be sure to apply this anytime I build a JFET circuit, because I've had shit luck with them. This is why I like op-amps

[dbat69]

Thank you for the information Frank - I have the JCM on my list of to-dos, so this is very useful.  Thank you for sharing

[motterpaul]

WOW - thank you Frank and IVIark (especially) for the FET tester.  I had been looking around for one but always seemed to get lost in lengthy articles that made me just want to go watch Simpsons marathons (mmm, potato chips). One site said it has one, but then you just get an article where they show two DMMs...

I have not looked at it yet but I am sure I will build it right away. The Jfets are a struggle. So far I feel pretty lucky in getting them to work, easier once I realized I need to test everything in a circuit by ear first. The Katana Rev2 I struggled with until I first noticed even some of the pots (volume, gain) made my J201s unbiasable if they weren't first dialed in.

I also learned its best to check the bias voltage, but to ultimately do it by ear.

Another thing is that if I had known, the first transistors I would have stocked up on are 2n5457, J201s, 2N5484, etc. Jfets are not like regular NPNs - There is no one size fits all.

Looking forward to being able to test mine - I have 50 2N5457s coming from two different sources this week. I also just got some 5485s.

[rocket88]

semi stupid statement/question. i remember mark mentioning about being curious about the DCA75, which can give you the D,S,and G. if it can also give these measurements, then i wonder how much easier it would make our lives will all these fet builds. anyone check that out?

[motterpaul]

Leave it to me to make this complicated, but...

"(2) If you are given a circuit ... can you determine what JFET Idss and Vp are needed?  The answer is yes!  You have to go through a bit of math (which I now have in a spreadsheet), but it looks like you can calculate the DC bias point and required drain resistor value for a given JFET (Idss, Vp are known), voltage (e.g. 9V),  source resistor, and desired drain bias voltage (e.g. 4.5V).  So at least you can know if a measured JFET will work OK or not. "

Questions - how do you use the FET tester?

1) Insert Jfet;
2) Connect your Supply (+ and -) and DMM+ and DMM-
3) Turn on the tester and switch to - Idss
4) Set your DMM to [what?] and record the Idss as [format]
5) Switch the tester off - switch to Vp - repeat step 2 & 3
6) Set your DMM to [what?] - record the Vp as [format]
7) Do [what math] to calculate the DC bias point?

Or more simple - how to do you set your DMM to read Idss, and Vp?   Then, what is the math to calculate desired bias voltage?

[Frank_NH]

Your steps are pretty much correct:

1) Insert Jfet;

Yes - make sure your drain, source, and gate legs are in the right holes of the socket. DAMHIKT

2) Connect your Supply (+ and -) and DMM+ and DMM-

Yes.  Set your DVM to read DC volts.

3) Turn on the tester and switch to - Idss

Yes.

4) Set your DMM to [what?] and record the Idss as [format]

Read the voltage number in volts, multiply by 10 and that will be the Idss in ** milliamps **.  For example, say the DVM read 0.0647 volts.  Idss = .0647 x 10 = 0.647 mA.

5) Switch the tester off - switch to Vp - repeat step 2 & 3

Actually, I just have a simple SPDT switch and switch right over to the Vp mode.  No need to turn the tester off.

6) Set your DMM to [what?] - record the Vp as [format]

Keep on the voltage setting.  Read the Vp directly.  Note that Vp is a negative number, so I record them as, for example, -0.933 V for a reading on the DVM of 0.933 V

---

I record these numbers now in a log after measuring them.  What I have done is to get some white masking tape and make labels with an alphabetic index (A, B, C, D) but you could use integer IDs.  Measure the jfets, record the Idss and Vp numbers in the log along with the label ID, then stick the label to the legs of the JFET.  I put these in a bag with other JFETS of like kind e.g. J201s in one bag, 2N5457s in another, etc.  So if I need a JFET with certain properties I can look at the list and quickly find the ID of the one I want in the bag.

7) Do [what math] to calculate the DC bias point?

Ah, that would take some time to explain, although the essential equations are fairly simple and can be put into a spreadsheet.  I'll see if I can condense it down.  Here's a practical explanation from Small Bear Electronics:

https://www.smallbearelec.com/HowTos/BreadboardBareAss/BreadboardBareAss.htm

But basically, when you have a common source JFET circuit (like Fig. 1 in the Fetzer article), what you want to set is the DC bias point of the circuit.  That is with no signal coming into the gate, you want to set the drain voltage and current to get good signal amplification with no premature clipping or distortion (if not desired).  You would normally choose a drain voltage around half the supply voltage (e.g. 4.5V for a supply of 9V) so as to allow a large signal gain without clipping.  But that's not set in stone, and you can have values slightly higher or lower and the circuit will still function.

So the question is this:  If you have a JFET circuit where the source and drain resistors are **given** (e.g. Wampler Plexi Drive**) and you want to achieve a certain drain voltage level (bias) how do you do it?  The answer is to choose a JFET with specific Idss and Vp.  The calculations will guide you to the proper values, but even if you didn't have that you could "audition" jfets in a circuit, find one that gave you the 4.5V drain voltage.  Then, if you had recorded it's Idss and Vp, you could search your stash for other JFETs with similar Idss and Vp.

You can also ask the opposite question - if you have a given JFET with a known Idss and Vp, what source and drain resistor values are needed to have it operate well in your overdrive design?  Again the equations can guide you here, but I also point you back to the Fetzer article which goes through their approach for setting up the "Fetzer Valve" circuit.  They have a neat calculator at the bottom of the page which gives you Rd and Rs for your JFET.  All you need to enter is the supply voltage, Idss, and Vp.  I will note again that the Fetzer circuit is just one way to bias the common source amp, and not the only way.

Finally, one of the interesting things about this JFET business is that, as pointed out in the Fetzer article, JFETs have operational properties similar to tubes (gate = grid, drain = anode, source = cathode), i.e. a large current is controlled by a small voltage signal at the gate/grid.  So you'll notice many early amp-in-a-box designs simply took a tube amp schematic, replaced the tube for a JFET, but kept the original anode/cathode resistor values!  Well, that only worked if you got lucky with your JFETs so they went to a drain trimmer configuration.  But even then, if you didn't have the right Idss and Vp, the JFET may not have biased correctly.  The newer designs appear to have gotten away from this and look more like the Fetzer valve circuit.  Regardless of the approach, you have make sure whatever JFETs are used in your build have appropriate Idss and Vp.  So start testing those JFETs!

Hope this helps... 

** For those who have built a Plexi Drive, I calculated that Idss = 0.65 mA, Vp = -0.93 V should get the stages to bias around 4.5 V.  Let me know if this works...

[Frank_NH]

For those who want to know more about the math and modeling behind JFET amplifier circuits, here is a great resource:

http://www.talkingelectronics.com/Download%20eBooks/Principles%20of%20electronics/CH-19.pdf

It's actually relatively simple algebra, and as I mentioned above can be put into a spreadsheet such that if you know Idss and Vp (or more precisely Vgs(off) = -Vp in the reference linked above), you can determine the required source and drain resistor values and other parameters for any operating point.

[motterpaul]

I have figured this much out - if I set up my non IC Jfet tester I can ground my DMM - send 9v to the Drain, and with the switch on Idss (for example) I can use the positive probe to read the pins on the transistor directly.

For example, on the 2547 I have inserted now I get: 1.472 on the S with the switch on Idss. If I switch to Vp I get .336 on the gate.  

I get different readings on different JFets. I just did a J201 (be sure to watch the pinouts, you will smoke them) this way and I got:

.979 on Idss and .085 on Vp.

I am on track or completely off base?